The present invention relates generally to semiconductor memories, memory units and a method of setting their types, and more particularly to technology effectively utilizable for RAMs (Random Access Memories) designed to have a greater storage capacity.
U.S. Pat. No. 4,965,768 discloses a memory having a PROM in which its mode can be set after it is packaged.
Dynamic and static RAMs have been manufactured as general-purpose memories in the form of semiconductor integrated circuits, and dynamic RAMs among them have also been manufactured so that different types may be obtained from one base chip to increase their mass-productibity further. The development of different types is achieved by (1) wiring mask option in the wafer process step and (2) bonding option in the assembling step. Then (3) burn-in, common and function tests are made, those which are proved nondefective are subjected to (4) marking, and put in (5) a warehouse to wait for shipment.
In the case of semiconductor memories such as dynamic RAMs, attempts have been made to increase their storage capacity with the progress in semiconductor technology. With increase in their storage capacity and their applications, their memory functions are tending to be diversified.
When about 1M-bit dynamic RAMs and about 4M-bit dynamic RAMs are replaced with about 16M-bit dynamic RAMs to be installed in microcomputers, the demand for refresh cycles, address configuration and power supply voltage by the users of 1M-bit dynamic RAM are different from that by those of 4M-bit dynamic RAM because the peripheral circuits are used without change.
Users to newly use 16M-bit dynamic RAMs, desire RAMs accessible in units of x 1 bit when a large storage capacity is required by the system in which the dynamic RAMs are installed, whereas when the system requires only a small storage capacity, they desire RAMs accessible in units of a plurality of bits such as x 8 bits or x 16 units. Moreover, there are some RAMs requiring high-speed access times and others not requiring such access times depending on the operating speed of the processor used.